TSMC Recognizes Synopsys with Four “Partner of the Year” Awards

(STL.News) – Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC recognized Synopsys with four “2019 Partner of the Year” awards during its recent TSMC 2019 Open Innovation Platform® Ecosystem Forum.  TSMC honored Synopsys for Interface IP, joint development of 6-nanometer (nm) design infrastructure, and joint delivery of both innovative SoIC 3D chip stacking and cloud-based productivity solutions.  Synopsys and TSMC have collaborated for almost 20 years, most recently to accelerate the adoption of FinFET technology for optimum power, performance, and area (PPA) for 5nm process technology.  This is the ninth consecutive year Synopsys has received both IP and electronic design automation (EDA) accolades from TSMC.” We have presented the 2019 Partner of the Year awards to Synopsys in recognition of our collaboration to deliver important innovations in the field of semiconductor design,” said Suk Lee, TSMC senior director, Design Infrastructure Management Division.  “With its extensive high-quality DesignWare IP portfolio, certified design platforms, and cloud solution, Synopsys and TSMC are addressing our customers’ needs to achieve their design goals and accelerate production.”

As recognized through the awards, the companies’ long-standing collaboration has over the past year yielded impressive achievements for the benefit of mutual customers:

TSMC certification of new, innovative features in Synopsys’ digital and custom implementation platforms extended to 6nm enablement for early customer engagements
Support for new TSMC-SoIC®3D advanced chip-stacking technology across the entire Synopsys Design Platform ensures realization of highest-performing 3D-IC solutions
Optimized TSMC VDE Cloud Solution, including EDA tools, IP, and TSMC design collateral, provides a proven environment for complex SoC designs with security features that lower cloud adoption barriers
Synopsys has achieved more than 250 design wins with DesignWare® IP on N7 process with N5P IP in development
“For nearly two decades, Synopsys and TSMC have been collaborating to make design implementation easier and help customers achieve their time-to-market goals,” said Michael Sanie, vice president of marketing and strategy for Synopsys’ Design Group. “Our deep engineering collaboration with TSMC to develop and deliver innovative solutions like SoIC 3D chip stacking, 6nm design implementations, as well as ongoing efforts to optimize the TSMC OIP Virtual Design Environment (OIP VDE) Cloud Solution and our DesignWare interface IP, have enabled mutual customers to take advantage of Synopsys’ proven, secure design platforms and IP portfolio.”